Led by Professor Viktor K. Prasanna
Partition-Centric Graph Processing accepted at USENIX ATC' 18
Our paper "Accelerating PageRank using Partition-Centric Graph Processing" has been accepted as a full paper at USENIX ATC '18. This paper describes a cache and memory efficient method to do SpMV with PageRank as an application.
Best Paper at FPGA '18
Shijie Zhou received Best Paper award at the 26th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA '18) for the paper titled "FASTCF: FPGA-based Accelerator for Stochastic-Gradient-Descent-based Collaborative Filtering".
Best Paper Nomination at FPGA '18
The paper "A Framework for Generating High Throughput CNN Implementations on FPGAs" by Hanqing Zeng and Chi Zhang was one of the 4 papers nominated for Best Paper Award at the 26th ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA '18).
Prof. Prasanna Received the Prestigious IEEE-CS Wallace McDowell Award
Viktor K. Prasanna, the Charles Lee Powell Chair in Engineering and professor of electrical engineering and computer science at the University of Southern California, has been named 2015 recipient of the IEEE Computer Society’s prestigious W. Wallace McDowell Award for his contributions to reconfigurable computing.
Prof. Prasanna Received the Use-Inspired Research Award
Viktor K. Prasanna was accorded the 2017 Use-Inspired Research Award by USC Viterbi School of Engineering for distinguished research on problems with practical significance.
Ren Chen's dissertation nominated for Best Dissertation in EE Department
Ren Chen's PhD dissertation titled "From Universal RAM-Based Permutation Network to Optimal Circuits for Data and Signal Processing Algorithms" nominated for Best Dissertation award in Electrical Engineering(Systems) Department, USC.
Charles L. Weber Outstanding Teaching Assistant Honorable Mention
Sanmukh R. Kuppanagiri received the Spring 2017, Honourable Mention for outstanding work as a Teaching Assistant
Best Paper Finalist at HPEC '16
The paper "On-chip Memory Efficient Data Layout for 2D FFT on 3D Memory Integrated FPGA" was one of the 5 papers to be nominated for Best Paper Award at the 20th IEEE International Conference on High Performance Extreme Computing (HPEC '16), September 2016.